Samsung, one of the three leading edge processor makers, had planned to start manufacturing samsung foundry forum on Wednesday.in 2021, but instead the new design will arrive in the first half of 2022. Korean electronics giant shares schedule for changes during its
The slip means customers who rely on Samsung will have to wait a long time to tap into the leading-edge technology. The biggest names using the company’s services are phone chip designer Qualcomm, server maker IBM and Samsung.
However, the good news for those customers is that Samsung later announced progress on the next generation of builds, a refinement that should arrive in the second half of 2025. This should lead to another step forward in chip performance, power efficiency and electronics miniaturization. , Samsung said.
Samsung’s top chipmaking rival, Taiwan Semiconductor Manufacturing Company, in August disclosed similar technology delays. Schedule slips take the pressure off a bit as part of a recovery plan that aims to .
The processor business is under immense pressure. PC sales, smartphone access and online services have been driven out of data centers as the pandemic escalates, with demand for processors outpacing manufacturing capacity. NS, game consoles, cars and other products that depend on electronics supply chains that span the world.
Based on Samsung’s conversations with customers, the processor shortage won’t decrease until 2022, said Sean Han, a samsung foundry Corporate Senior Vice President based on Samsung’s interactions with customers. “In our view, this will last another six to nine months, although we are investing, and other foundry suppliers are increasing their capacity,” he said at a briefing before the Samsung Foundry Forum.
Moving to the next generation of manufacturing technology is extraordinarily complex. Chips are made up of billions of electronic components called transistors, each much smaller than a speck of dust. Chip fabrication plants, called fabs, etch circuitry patterns on silicon wafers with a process that requires dozens of steps that takes months.
Progress comes from miniaturizing transistors so that more can be squeezed onto a chip, increasing their speed and reducing their power consumption. Samsung’s next-generation process, which it calls 3GAE, uses a technology called Get All Around (GAA). This is an early version of the technique.
In 2023, Samsung expects to reach higher production volumes with a more mature version called 3GAP. The 3 in the name refers to the 3-nanometer measurement, although no longer directly linked to the dimensions of the chip electronics, serving as a label for advances in manufacturing methods.
2 nanometer manufacturing in 2025
Then in 2025, the company plans to move to another, more advanced get-all-around technology it calls 2GAP. That manufacturing method will be the first of Samsung’s 2nm generation. An improvement would be in the number of current-carrying “nanoribbons” that would penetrate the surrounding gate material, increasing from 3 to 4 nanoribbons in the 3 nm generation.
As chips become more complex, they often also become more expensive, which is why many chip buyers stick to older, cheaper manufacturing processes such as companies. Global Foundries.
But Samsung believes it could make the new manufacturing processes more economically attractive to customers.
“Although GAA is a difficult technology, we will strive to reduce the cost per transistor,” said Moonsu Kang, head of Samsung’s foundry strategy team. “That trend will continue.”
chip packaging improvements
For decades, Moore’s Law has charted how miniaturization has allowed chip designers to pack as many transistors as possible into a given chip area. But the slow pace of commute has made other avenues of progress more important.
One major direction is packaging – the way in which different “chiplets” can be combined into a single large processor. Samsung is working to improve the variety of chips that can be connected edge-to-edge, called 2.5D integrated circuits, or sandwiched on top of each, called 3D. It is also working on packing the data links between the chips more densely for higher speed connections.
And it’s got a new term for combining 2.5D and 3D connections: 3.5D. “Such a chip will allow us to achieve unprecedented performance and density,” Kang said in a talk.
That’s what Intel is already doing with its Ponte Vecchio processors, an exotic chip good for graphics, artificial intelligence and supercomputing purposes.
A major benefit of packaging advances is an idea called heterogeneous integration – combining different types of chips manufactured with different processes. This allows chipmakers to merge costly outdated manufacturing processes for some components and state-of-the-art processes for parts where performance is critical, for example.